1. Field of the Invention
The present invention relates to the formation of writing structures in integrated circuit devices. More particularly, the present invention relates to the formation of vias, contacts and wiring lines by using a dual damascene process spin-on-glass materials.
2. Description of the Prior Art
Some specific structures, that are semiconductor highly integrated circuits utilize multilevel wiring line structures, usually for interconnecting regions within devices. Also this arrangement is for interconnecting one or more devices within the integrated circuits. Conventionally such an arrangement provides the first or lower level wiring lines or interconnect structures and then form a second level wiring line in contact with the first level wiring lines or interconnect structures.
FIG. 1A shows a semiconductor substrate 100 formed firstly and then silicon oxide layer 101 is deposited onto the substrate 100 using PECVD method. Sequentially, shown in FIG. 1B, silicon nitride layer 102 is then deposited upon the silicon oxide layer 101, by applying PECVD method as well. Next, FIG. 1C a silicon oxide layer 103 is deposited on the silicon nitride 102. Consequentially a pattern of metal lines is transferred and defined on the silicon nitride 102 and the silicon oxide layer 103. Then the silicon nitride 102 and the silicon oxide layer 103 are removed to form a multitude of openings for metal lines, shown as FIG. 1D. Next, depicted in FIG. 1E, a photoresist layer 104 is blanket formed on the silicon oxide layer 101 and the surface and side walls of the silicon oxide layer 103. Another pattern is first transferred onto the photoresist layer 104 and thereafter the silicon oxide layer 101 is partially removed to form a multitude of vias, shown in FIG. 1F. According to the above process, the critical dimension will very thick and therefore it also will seriously effect whole processing.
Commonly, the photoresist layer should be formed thicker for using and owning a long depth of focus in order to expose the entire thickness of the photoresist mask. However, for use of steppers that need high solution, it is difficult in forming quite deep focus in the process. Also it makes thick critical dimension happening and reduces reliability of production.
Interconnections are typically formed between the first level wiring line or interconnect and other portions of the integrated circuit device or to structures external to the integrated circuit device. This will be accomplished through the second level of wiring lines.